Magneto-electric sensor for hardware trojan detection

ABSTRACT

A sensing circuit for detecting hardware trojans in a target integrated circuit is provided. The sensing circuit includes an array of magnetic tunnel junction circuits where each magnetic tunnel junction circuit including one or more magnetic tunnel junctions. Characteristically, each magnetic tunnel junction circuit configured to provide data for and/or determine a temperature map or a current map of the target integrated circuit.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. provisional application Ser.No. 63/017,229 filed Apr. 29, 2020, the disclosure of which is herebyincorporated in its entirety by reference herein.

TECHNICAL FIELD

In at least one aspect, the present invention relates to a method anddevice for detecting hardware trojans is provided.

BACKGROUND

Although advantageous, run-time hardware trojan detection techniqueshave been severely limited due to associated circuit complexity, areaoverhead, and limited IC mapping resolution. Examples of prior artmethods for detecting hardware trojans include side-channelfinger-printing for creating a golden benchmark, synchrotron X-ray basedreconstruction of a chip, use of IR cameras for thermal mapping of achip, use of thermal CMOS sensors for on-chip monitoring, and use ofCMOS current sensors for on-chip monitoring.

Since hardware trojans are embedded in an integrated circuit, they arehard to detect and impede the security of the integrated circuits.

SUMMARY

In at least one aspect, a sensing circuit for detecting hardware trojansin a target integrated circuit is provided. The sensing circuit includesan array of magnetic tunnel junction circuits where each magnetic tunneljunction circuit including one or more magnetic tunnel junctions.Characteristically, each magnetic tunnel junction circuit configured toprovide data for and/or determine a temperature map or a current map ofthe target integrated circuit.

In another aspect, a novel multi-modal method and related hardware fordetecting hardware trojans is provided.

In another aspect, a method of using high dynamic range multi-modalmagnetic tunnel junction (MTJ) based sensors for fine-grain mapping of achip is provided.

In another aspect, multi-modal sensing significantly improves therobustness of the proposed scheme.

In another aspect, run-time sensing allowing continuous monitoringpost-deployment of the chip is provided.

In another aspect, multi-modal analysis improves the accuracy of MLalgorithms that could be used for Trojan detection.

In another aspect, an on-chip sensor grid consisting of arrays ofsemiconductor diodes and MTJs is provided.

In another aspect, an on-chip sensor grid consisting of arrays ofsemiconductor diodes and cascaded MTJs is provided.

In another aspect, an on-chip sensor grid consisting of arrays ofsemiconductor diodes and cascaded telegraphic MTJs

In another aspect, an on-chip sensor grid consisting of arrays ofsemiconductor diodes and non-cascaded telegraphic MTJs

In another aspect, an on-chip sensor grid consisting of arrays ofsemiconductor diodes and voltage-controlled magnetic anisotropy basedMTJs

In another aspect, a method of enabling multi-modal sensing (temperatureand current) by using telegraphic MTJs is provided

In another aspect, a method of enabling disturb free read for anintegrated structure consisting of a semiconductor diode and MTJs isprovided

In another aspect, a method of improving the dynamic range of sensingusing cascaded telegraphic MTJs is provided.

In another aspect, a method of enabling lower area on-chip sensors usingan integrated structure consisting of a semiconductor diode and MTJs isprovided.

In another aspect, magnetic tunnel junction circuits are placed on anyback end of line metal layers including the first metal layer or the farbackend of line metal layer.

In still another aspect, a detection system for detecting hardwaretrojans in a target integrated circuit is provided. The detection systemincludes a sensing circuit comprising an array of magnetic tunneljunction circuits. Each magnetic tunnel junction circuit includes one ormore magnetic tunnel junctions. Each magnetic tunnel junction circuit isconfigured to provide data for and/or determine a temperature map or acurrent map of the target integrated circuit. A microprocessor system isin electrical communication with the sensing system. The microprocessorsystem configured to receive data from the sensing circuit for producingthe temperature map or the current map.

Advantageously, the present invention can provide higher sensingresolution than the state of the art IR cameras (e.g., 2×-4× or higherthan such cameras). Moreover, the present invention provides a sensingcircuit having zero (e.g., minimal) leakage and low area overhead sincethe use of MTJ as a sensor implies no standby leakage. Moreover,diode-based circuits can significantly reduce area overhead.

BRIEF DESCRIPTION OF THE DRAWINGS

For a further understanding of the nature, objects, and advantages ofthe present disclosure, reference should be had to the followingdetailed description, read in conjunction with the following drawings,wherein like reference numerals denote like elements and wherein:

FIG. 1A. Schematic of hardware for detecting hardware trojans.

FIG. 1B. Overview schematic of application of hardware using temperaturesensing.

FIG. 1C. Overview schematic of application of hardware using currentsensing.

FIG. 2A. Schematic of TMR change temperature sensing circuit.

FIG. 2B. Plot of TMR and resistance versus temperature.

FIG. 3 . Schematic of a sensing circuit with diodes for sensingtemperature by measuring TMR change.

FIG. 4A. Schematic of a sensing circuit using telegraphic MTJs for highdynamic range temperature/current sensing.

FIG. 4B. Plot of MTJ telegraphic behavior.

FIG. 5 . Schematic of a sensing circuit using telegraphic VCMA-MTJ forhigh dynamic range temperature/current sensing.

FIG. 6 . Schematic of a sensing circuit using telegraphic c VCMA-MTJhigh dynamic range temperature/current sensing with diodes.

FIG. 7 . Schematic of a sensing circuit using telegraphic MTJ highdynamic range temperature/current sensing with diodes.

FIG. 8 . Schematic of a detection system for detecting hardware trojansin a target integrated circuit

DETAILED DESCRIPTION

Reference will now be made in detail to presently preferred embodimentsand methods of the present invention, which constitute the best modes ofpracticing the invention presently known to the inventors. The Figuresare not necessarily to scale. However, it is to be understood that thedisclosed embodiments are merely exemplary of the invention that may beembodied in various and alternative forms. Therefore, specific detailsdisclosed herein are not to be interpreted as limiting, but merely as arepresentative basis for any aspect of the invention and/or as arepresentative basis for teaching one skilled in the art to variouslyemploy the present invention.

It is also to be understood that this invention is not limited to thespecific embodiments and methods described below, as specific componentsand/or conditions may, of course, vary. Furthermore, the terminologyused herein is used only for the purpose of describing particularembodiments of the present invention and is not intended to be limitingin any way.

It must also be noted that, as used in the specification and theappended claims, the singular form “a,” “an,” and “the” comprise pluralreferents unless the context clearly indicates otherwise. For example,reference to a component in the singular is intended to comprise aplurality of components.

The term “comprising” is synonymous with “including,” “having,”“containing,” or “characterized by.” These terms are inclusive andopen-ended and do not exclude additional, unrecited elements or methodsteps.

The phrase “consisting of” excludes any element, step, or ingredient notspecified in the claim. When this phrase appears in a clause of the bodyof a claim, rather than immediately following the preamble, it limitsonly the element set forth in that clause; other elements are notexcluded from the claim as a whole.

The phrase “consisting essentially of” limits the scope of a claim tothe specified materials or steps, plus those that do not materiallyaffect the basic and novel characteristic(s) of the claimed subjectmatter.

With respect to the terms “comprising,” “consisting of,” and “consistingessentially of,” where one of these three terms is used herein, thepresently disclosed and claimed subject matter can include the use ofeither of the other two terms.

It should also be appreciated that integer ranges explicitly include allintervening integers. For example, the integer range 1-10 explicitlyincludes 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10. Similarly, the range 1 to100 includes 1, 2, 3, 4 . . . 97, 98, 99, 100. Similarly, when any rangeis called for, intervening numbers that are increments of the differencebetween the upper limit and the lower limit divided by 10 can be takenas alternative upper or lower limits. For example, if the range is 1.1.to 2.1 the following numbers 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, and2.0 can be selected as lower or upper limits.

It should also be appreciated that integer ranges explicitly include allintervening integers. For example, the integer range 1-10 explicitlyincludes 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10. Similarly, the range 1 to100 includes 1, 2, 3, 4 . . . 97, 98, 99, 100. Similarly, when any rangeis called for, intervening numbers that are increments of the differencebetween the upper limit and the lower limit divided by 10 can be takenas alternative upper or lower limits. For example, if the range is 1.1.to 2.1 the following numbers 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, and2.0 can be selected as lower or upper limits.

The term “connected to” means that the electrical components referred toas connected to are in electrical communication. In a refinement,“connected to” means that the electrical components referred to asconnected to are directly wired to each other. In another refinement,“connected to” means that the electrical components communicatewirelessly or by a combination of wired and wirelessly connectedcomponents. In another refinement, “connected to” means that one or moreadditional electrical components are interposed between the electricalcomponents referred to as connected to with an electrical signal from anoriginating component being processed (e.g., filtered, amplified,modulated, rectified, attenuated, summed, subtracted, etc.) before beingreceived to the component connected thereto.

The term “electrical communication” means that an electrical signal iseither directly or indirectly sent from an originating electronic deviceto a receiving electrical device. Indirect electrical communication caninvolve processing of the electrical signal, including but not limitedto, filtering of the signal, amplification of the signal, rectificationof the signal, modulation of the signal, attenuation of the signal,adding of the signal with another signal, subtracting the signal fromanother signal, subtracting another signal from the signal, and thelike. Electrical communication can be accomplished with wiredcomponents, wirelessly connected components, or a combination thereof.

The term “one or more” means “at least one” and the term “at least one”means “one or more.” The terms “one or more” and “at least one” include“plurality” as a subset.

The term “substantially,” “generally,” or “about” may be used herein todescribe disclosed or claimed embodiments. The term “substantially” maymodify a value or relative characteristic disclosed or claimed in thepresent disclosure. In such instances, “substantially” may signify thatthe value or relative characteristic it modifies is within ±0%, 0.1%,0.5%, 1%, 2%, 3%, 4%, 5% or 10% of the value or relative characteristic.

The term “electrical signal” refers to the electrical output from anelectronic device or the electrical input to an electronic device. Theelectrical signal is characterized by voltage and/or current. Theelectrical signal can be stationary with respect to time (e.g., a DCsignal) or it can vary with respect to time.

The term “electronic component” refers is any physical entity in anelectronic device or system used to affect electron states, electronflow, or the electric fields associated with the electrons. Examples ofelectronic components include, but are not limited to, capacitors,inductors, resistors, thyristors, diodes, transistors, etc. Electroniccomponents can be passive or active.

The term “electronic device” or “system” refers to a physical entityformed from one or more electronic components to perform a predeterminedfunction on an electrical signal.

It should be appreciated that in any figures for electronic devices, aseries of electronic components connected by lines (e.g., wires)indicates that such electronic components are in electricalcommunication with each other. Moreover, when lines directed connect oneelectronic component to another, these electronic components can beconnected to each other as defined above.

Throughout this application, where publications are referenced, thedisclosures of these publications in their entireties are herebyincorporated by reference into this application to more fully describethe state of the art to which this invention pertains.

The term “hardware trojan” refers to any malicious modification of thecircuitry of an integrated circuit or the inclusion of a maliciouscomponent therein.

Abbreviations:

“AP” means antiparallel.

“BEOL” means back end of line.

“GND” means ground.

“MTJ” means magnetic tunnel junction.

“P” means parallel.

“TMR” means tunnel magnetoresistance.

“VCMA” means voltage controlled magnetic anisotropy.

“VDD” or “Vdd” refers to a voltage, typically, a positive DC voltage.For example, this voltage can be 0.2-1 V for 28 nm to 2 nm nodes (e.g.,0.8V nominally for 12 nm and 0.65V nominally for 7 nm).

Depending on the technology nodes. FIG. 1A provides a schematic of asensing circuit for detecting trojan hardware. Characteristically,electronic device 10 includes a mesh of MTJs as on-chip that function astemperature and current monitors. Sensing circuit 10 is incorporatedwithin or positioned proximate to a target integrated circuit 12 (on achip) for which the presence of a hardware trojan is to be detected. Inthis context, positioned proximate can mean touching the integratedcircuit or within 0.1 to 1 mm.

In a refinement, the mesh of MTJs provides a mesh of nano-magneticsensors in Back-End-of-Line for generating a thermal and current map ofthe chip. In this regard, electronic device 10 includes a grid 14 ofBEOL MTJ circuits MTJC_(ij) where i and j are integers labeling the MTJcircuits. The MTJ circuits are located at an array of positions Pij.Characteristically, each MTJ circuit can include a single MTJ or aplurality of MTJs along with additional electronic components fortemperature or current sensing, as set forth below in more detail.Advantageously, area overhead for this design can be about 10% (for 2×resolution) and ˜37% (for 4× resolution) at a 12 nm node for a 10 mm×10mm chip. In a modified diode-based design, the area overhead is about1%-5%. In a refinement, the MTJs are separated on the array by adistance corresponding to the minimum pitch of that metal layer, say forexample, if the MTJs are placed in the first metal layers of an advancedprocessor such as finfet technology, the minimum pitch may be of theorder of 70 to 80 nm. If it is placed at the far back end of line, theMTJs will be placed at the corresponding minimum pitch of that metallayer. It could also be placed at a farthest distance of 0.5 micron. Thedistance placed will also depends on the corresponding cell size.

As set forth above, each MTJ circuits MTJC_(ij) includes one or moremagnetic tunnel junction. The magnetic tunnel junction includesferromagnets separated by a thin insulator. An example of a useful MTJstructure is FeCoB/MgO/FeCoB. As used in the present embodiments, theMTJs have an average size of less than 80 nm in radius if they areout-of-plane magnets and elliptical in shape if they are in-planemagnets. If elliptical, their aspect ratio may be less than 1:2 with oneside being larger than the other side. Eg: 40×80 nm.

FIG. 1B provides an overview schematic of application of hardware usingtemperature sensing. FIG. 1C provides an overview schematic ofapplication of hardware using current sensing. In both of thesevariations, temperature or current map can be created since thepositions Pij within the integrated circuit are known. Such maps plotthe temperature or current over an area of the integrated circuit beingstudied. A map of the chip generated using MTJ based thermal and currentsensors can then be used as input to Machine Learning (ML) algorithmslike deep learning, Kalman filter based techniques, principal componentanalysis, etc. for trojan detection. Specifically, a multi-modal MLtrojan detection algorithm that exploits uncorrelated and correlateddata between thermal and current maps as well as the relative pixelintensity within each map with respect to other pixels can be employedfor high accuracy trojan detection.

With respect to the sensing capability of circuit 10, MTJ parameters(e.g., TMR and telegraphic behavior) are known to be a strong functionof temperature and of a current-induced magnetic field. In a refinement,thermal sensing MTJs can be placed in deep back-end-of-line forefficient temperature sensing. In another refinement, MTJs in theproximity of a power delivery network can be strategically placed foruse as current sensors (by sensing the current-induced magnetic field).Advantageously, circuit 10 enables the use of seamlessly cascaded MTJsin the telegraphic switching regime for high dynamic range temperatureand current sensing.

FIG. 2A provides a schematic of a TMR change temperature sensingcircuit. Sensing circuit MTJC_(ij) is used to determine the percentdifference (TMR (%)) between the TMR for the off-state (RA_(AP)) and theon-state (RA_(p)) of the MTJ in the circuit. FIG. 2B provides plots ofTMR, the off-state resistance RA_(AP) and the on-state resistance RA_(p)are functions of temperature. In this variation, each MTJC_(ij)(positioned at positions P_(ij)) includes a pair of MTJs 20 and 22. In arefinement, MTJ 20 is set to the antiparallel state (AP), while MTJ 22is set to the parallel state. Current I_(AP) powered from voltage Vreadflows through MTJ 20 while current I_(P) from current source 24 flowthrough MTJ 22 to ground. Vread is a voltage, typically positive DCvoltage. For example, this voltage can be 0.2-1 V for 28 nm to 2 nmnodes (e.g., 0.8V nominally for 12 nm and 0.65V nominally for 7 nm). Avoltage V₁ from MTJ 20 and a voltage V₂ from MTJ 22 is provided todifferential amplifier 26 to provide an output voltage V_(out) that isused to monitor temperature and create a temperature map of the targetintegrated circuit. Selection transistors 28 and 30 are used to actuatea predetermined MTJC_(ij) for sensing. In this regard, selectiontransistor 24 is in series with MTJ 20, and selection transistor 30 isin series with MTJ 22. A controller as described below can send controlsignals on control line 32 to the gates of selection transistors 28 and30 to selectively activate a given sensing circuit MTJCij as desired.

FIG. 3 provides a schematic of a sensing circuit with diodes for sensingtemperature by measuring TMR change. This variation operatessubstantially the same as the circuit depicted in FIG. 2 , but thetransistors 24 and 26 replaced by diodes 34 and 36 with diode 34 inseries with MTJ 20, and diode 36 is in series with MTJ 22. Sincecurrents flow in only one direction, transistors can be replaced withBEOL diodes resulting in significant area savings. Therefore, diodes 34and 36 are oriented to allow current to flow through MTJ 20 and MTJ 22,respectively.

FIG. 4A provides a schematic of a circuit using cascaded telegraphicMTJs for high dynamic range temperature/current sensing. FIG. 4Bprovides a plot of MTJ telegraphic behavior. In this variation, sensingcircuit MTJC_(ij) (positioned at positions P_(ij)) includes a pluralityof MTJs 38 ^(n) with a different energy barrier for each MTJ 38 ^(n)where n is an integer label. These different energy barriers can beachieved by the MTJs 38 ^(n) having increasing cross-section area. In arefinement, the MTJs have increasing energy-barriers such that adifferent temperature range can be mapped by each MTJ. A currently flowsthrough each MTJ 38 ^(n) such that temperature or an inductively coupledmagnetic field can change the probability of a transition from parallelstate of the MTJ to the antiparallel state (or vice versa). The voltageoutput from the MTJ switches transistor 40′″ which allows current L tobe provided to form output current I_(out) used for the temperaturesensing or current sensing. In this variation, the current through eachtransistor is added together to form output current I_(out). Selectiontransistors 42 ^(n) are used to actuate a predetermined MTJC_(ij) forsensing. A controller as described below can send control signals oncontrol line 43 to the gates of selection transistors 42 ^(n) toselectively activate a given sensing circuit MTJCij as desired.

FIG. 5 provides a schematic of a sensing circuit using telegraphicVCMA-MTJ for high dynamic range temperature/current sensing. Thisvariation operates substantially the same as the circuit depicted inFIG. 4 . However, MTJC_(ij) (positioned at positions P_(ij)) uses avoltage-controlled magnetic anisotropy mechanism to create MTJs withincreasing energy barrier. In this variation, a different voltage (e.g.,increasing voltage) is applied to each MTJ 38 ^(n).

FIG. 6 provides a schematic of a sensing circuit using telegraphicVCMA-MTJ high dynamic range temperature/current sensing with diodes.This variation operates substantially the same as the circuit depictedin FIG. 5 , except that the selection transistors 42 ^(n) are replacedby diodes 44 ^(n).

FIG. 7 provides a schematic of a sensing circuit using telegraphic MTJhigh dynamic range temperature/current sensing with diodes. Thisvariation operates substantially the same as the circuit depicted inFIG. 4 , except that the selection transistors 42 ^(n) are replaced bydiodes 46 ^(n).

Referring to FIG. 8 , a schematic of a detection system for detectinghardware trojans in a target integrated circuit is provided. Detectionsystem 50 includes a microprocessor system 52 in electricalcommunication with sensing circuit 54. Sensing circuit 54 is of thedesigns set forth in FIGS. 1 to 7 . In general, sensing circuit 54includes an array of magnetic tunnel junction circuits MTJCij where i anj are integer labels. Each magnetic tunnel junction circuit MTJCijincludes one or more magnetic tunnel junctions. Moreover, each magnetictunnel junction circuit MTJCij is configured to provide data for and/ordetermine a temperature map or a current map of the target integratedcircuit. Characteristically, microprocessor system 52 configured toreceive data from the sensing circuit for producing the temperature mapor the current map. Microprocessor system 52 includes computer processor56 in communication with random access memory 58. Microprocessor system52 can operate as a controller for sensing circuit 54. Computerprocessor 56 executes instructions for producing the current and/or thetemperature maps. In a refinement, computer processor 56 executes themachine learning algorithms (e.g., a trained neural network) foridentifying hardware Trojans from the current and/or the temperaturemaps or data thereof. Microprocessor system 52 also includesnon-transitory memory 60 (e.g., DVD, ROM, hard drive, optical drive,etc.) which can have encoded instructions thereon for producing thecurrent and/or the temperature maps. Typically, the encoded instructionswill be loaded into random access memory 58 from non-transitory memory60 and then executed by computer processor 56. Microprocessor system 52also includes input/output interface 62 that can be connected todisplayer 68, keyboard and mouse. Input/output interface 62 provides theelectrical communication with sensing circuit 54. In a refinement,microprocessor system 52 is configured to send control signals to theselection transistors of FIGS. 2A and 4A.

While exemplary embodiments are described above, it is not intended thatthese embodiments describe all possible forms of the invention. Rather,the words used in the specification are words of description rather thanlimitation, and it is understood that various changes may be madewithout departing from the spirit and scope of the invention.Additionally, the features of various implementing embodiments may becombined to form further embodiments of the invention.

1. A sensing circuit for detecting hardware trojans in a targetintegrated circuit, the sensing circuit comprising: an array of magnetictunnel junction circuits, each magnetic tunnel junction circuitincluding one or more magnetic tunnel junctions, each magnetic tunneljunction circuit configured to provide data for and/or determine atemperature map or a current map of the target integrated circuit. 2.The sensing circuit of claim 1 wherein the sensing circuit isincorporated within or positioned proximate to the target integratedcircuit.
 3. The sensing circuit of claim 1 wherein the one or moremagnetic tunnel junctions are positioned in deep back-end-of-line forefficient temperature sensing.
 4. The sensing circuit of claim 1 whereinthe one or more magnetic tunnel junctions are positioned in proximity ofpower delivery network for use as current sensors by sensing a currentinduced magnetic field.
 5. The sensing circuit of claim 1 wherein eachmagnetic tunnel junction circuit is used to determine a percentdifference between a tunnel magnetoresistance for an off-state (RA_(AP))and a tunnel magnetoresistance. for an on-state (RA_(p)) of a selectedmagnetic tunnel junction.
 6. The sensing circuit of claim 5 wherein eachmagnetic tunnel junction circuit includes a first magnetic tunneljunction and a second magnetic tunnel junction, the first magnetictunnel junction being set in an antiparallel state and the secondmagnetic tunnel junction being set in a parallel state such that a firstvoltage from the first magnetic tunnel junction and a second voltagefrom the second magnetic tunnel junction is provided to a differentialamplifier to provide an output voltage V_(out) that is used to monitortemperature and create the temperature map of the target integratedcircuit.
 7. The sensing circuit of claim 6 further comprising a firstselection transistor in series with the first magnetic tunnel junctionand a second selection transistor in series with the second magnetictunnel junction.
 8. The sensing circuit of claim 6 further comprising afirst diode in series with the first magnetic tunnel junction and asecond diode in series with the second magnetic tunnel junction.
 9. Thesensing circuit of claim 1 wherein each magnetic tunnel junction circuitincludes a plurality of cascaded telegraphic magnetic tunnel junctionsfor high dynamic range temperature/current sensing.
 10. The sensingcircuit of claim 9, wherein the plurality of cascaded telegraphicmagnetic tunnel junctions includes magnetic tunnel junctions withincreasing energy barriers.
 11. The sensing circuit of claim 10 whereineach magnetic tunnel junctions has an associated transistor that allowsa current to be provided as an output.
 12. The sensing circuit of claim11 wherein each magnetic tunnel junction circuit includes a selectiontransistor associated with each magnetic tunnel junction in theplurality of cascaded telegraphic magnetic tunnel junctions.
 13. Thesensing circuit of claim 11 wherein each magnetic tunnel junctioncircuit includes a diode associated with each magnetic tunnel junctionin the plurality of cascaded telegraphic magnetic tunnel junctions. 14.The sensing circuit of claim 11, wherein the sensing circuit usestelegraphic VCMA-MTJ for high dynamic range temperature/current sensing.15. The sensing circuit of claim 14 wherein the magnetic tunnel junctioncircuit uses a voltage-controlled magnetic anisotropy mechanism tocreate magnetic tunnel junctions with increasing energy barrier.
 16. Thesensing circuit of claim 15, wherein a different voltage is applied toeach magnetic tunnel junction circuit.
 17. The sensing circuit of claim16, wherein the different voltage is an increasing voltage.
 18. Thesensing circuit of claim 17, wherein each magnetic tunnel junctioncircuit includes a selection transistor associated with each magnetictunnel junction in the plurality of cascaded telegraphic magnetic tunneljunctions.
 19. The sensing circuit of claim 17, wherein each magnetictunnel junction circuit includes a diode associated with each magnetictunnel junction in the plurality of cascaded telegraphic magnetic tunneljunctions.
 20. The sensing circuit of claim 1, wherein magnetic tunneljunction circuits are placed on any back end of line metal layersincluding the first metal layer or the far backend of line metal layer.21. A detection system for detecting hardware trojans in a targetintegrated circuit, the detection system including: a sensing circuitcomprising an array of magnetic tunnel junction circuits, each magnetictunnel junction circuit including one or more magnetic tunnel junctions,each magnetic tunnel junction circuit configured to provide data forand/or determine a temperature map or a current map of the targetintegrated circuit. a microprocessor system in electrical communicationwith the sensing system, the microprocessor system configured to receivedata from the sensing circuit for producing the temperature map or thecurrent map.
 22. The detection system of claim 21 wherein the sensingcircuit is incorporated within or positioned proximate to the targetintegrated circuit.
 23. The detection system of claim 21 wherein the oneor more magnetic tunnel junctions are positioned in deepback-end-of-line for efficient temperature sensing.
 24. The detectionsystem of claim 21 wherein the one or more magnetic tunnel junctions arepositioned in proximity of power delivery network for use as currentsensors by sensing a current induced magnetic field.
 25. The detectionsystem of claim 21 wherein each magnetic tunnel junction circuit is usedto determine a percent difference between a tunnel magnetoresistance foran off-state (RA_(AP)) and a tunnel magnetoresistance. for an on-state(RA_(p)) of a selected magnetic tunnel junction.
 26. The detectionsystem of claim 25 wherein each magnetic tunnel junction circuitincludes a first magnetic tunnel junction and a second magnetic tunneljunction, the first magnetic tunnel junction being set in anantiparallel state and the second magnetic tunnel junction being set ina parallel state such that a first voltage from the first magnetictunnel junction and a second voltage from the second magnetic tunneljunction is provided to a differential amplifier to provide an outputvoltage V_(out) that is used to monitor temperature and create thetemperature map of the target integrated circuit.
 27. The detectionsystem of claim 26 further comprising a first selection transistor inseries with the first magnetic tunnel junction and a second selectiontransistor in series with the second magnetic tunnel junction.
 28. Thedetection system of claim 27 wherein the microprocessor system isconfigured to send control signals to the first selection transistor.29. The detection system of claim 21 wherein each magnetic tunneljunction circuit includes a plurality of cascaded telegraphic magnetictunnel junctions for high dynamic range temperature/current sensing. 30.The detection system of claim 29, wherein the plurality of cascadedtelegraphic magnetic tunnel junctions includes magnetic tunnel junctionswith increasing energy barriers.
 31. The detection system of claim 30wherein each magnetic tunnel junctions has an associated transistor thatallows a current to be provided as an output.
 32. The detection systemof claim 31 wherein each magnetic tunnel junction circuit includes aselection transistor associated with each magnetic tunnel junction inthe plurality of cascaded telegraphic magnetic tunnel junctions.
 33. Thedetection system of claim 32 wherein the microprocessor system isconfigured to send control signals to each selection transistor.
 34. Thedetection system of claim 21, wherein magnetic tunnel junction circuitsare placed on any back end of line metal layers including the firstmetal layer or the far backend of line metal layer.